6. Stratix IV GT Transceiver Signal
Integrity Demonstration
The kit installs a demonstration application and test designs. The application
provides an easy-to-use interface where you can select various transceiver settings
and observe the result. Before you run the application and test designs, connect the
USB cable to the board and navigate to the Stratix IV GT Transceiver Signal Integrity
Demonstration application as explained in “Installing the Transceiver Signal Integrity
Test Designs
Altera provides a set of SRAM Object File ( .sof ) test designs for the evaluation of the
Stratix IV GT device transceiver performance and board features. Before you run the
application, use the Quartus II Programmer to configure the Stratix IV GT device with
one of the .sof files. Table 6–1 shows file name, data rate, transceiver mode, and clock
source details for each test design.
Table 6–1. Test Design Details
File Name
signal_integrity_demo1.sof
signal_integrity_demo2.sof
Transceiver Block
and Channel
Block 2 Channel 0
Block 2 Channel 1
Block 1 Channels 2-5
Block 2 Channel 0
Block 2 Channel 1
Block 1 Channels 6-9
Data Rate
(Gbps)
11.3
11.3
10.3125
11.3
11.3
10.3125
Transceiver Mode
Basic mode with low latency
PCS enabled (1)
Basic mode with low latency
PCS enabled (1)
Basic mode with low latency
PCS enabled (1)
Basic mode with low latency
PCS enabled (1)
Basic mode with low latency
PCS enabled (1)
Basic mode with low latency
PCS enabled (1)
Clock Source
Y4 (706.25 MHz)
Y4 (706.25 MHz)
Y3 (644.53 MHz)
Y4 (706.25 MHz)
Y4 (706.25 MHz)
Y3 (644.53 MHz)
Note to Table 6–1 :
(1) This is the only transceiver mode available for the corresponding data rate.
1
Early-release kits might not ship with the latest designs and new designs might be
added after kit release. Refer to “Connecting to the Board Update Portal Web Page”
on page 5–1 to access the most current designs and revisions.
Configuring the FPGA Using Quartus II Programmer
It is sometimes necessary to use the Quartus II Programmer to configure the FPGA
with specific .sof files, such as the designs in Table 6–1 . Before configuring the FPGA,
ensure that the Quartus II Programmer and the USB-Blaster driver are installed on the
host computer and the development board is powered up.
January 2012
Altera Corporation
Transceiver Signal Integrity Development Kit,
Stratix IV GT Edition User Guide
相关PDF资料
DLP-2232H MODULE USB ADAPTER FOR FT2232H
DLP-2232ML-G MODULE USB ADAPTR FOR FT2232D LP
DLP-2232MSPF MODULE USB ADAPTER WITH MCU
DLP-CB-DLPC200-10R BOARD CONTROLLER FOR DLP
DLP-D-G MODULE USB SECURITY DONGLE
DLP-HS-FPGA2 MODULE USB ADAPTER FOR FT2232H
DLP-IOR4 MODULE LATCHING-RELAY 4-CH
DLP-TEMP-G MODULE DATA-ACQUISITION 3-CH
相关代理商/技术参数
DK-SI-4SGX230N 功能描述:可编程逻辑 IC 开发工具 FPGA Development Kit For EP4SGX230 RoHS:否 制造商:Altera Corporation 产品:Development Kits 类型:FPGA 工具用于评估:5CEFA7F3 接口类型: 工作电源电压:
DK-SI-5SGTMC7/ES 功能描述:可编程逻辑 IC 开发工具 FPGA Starter Kit For Stratix V 5SGTMC7 ES RoHS:否 制造商:Altera Corporation 产品:Development Kits 类型:FPGA 工具用于评估:5CEFA7F3 接口类型: 工作电源电压:
DK-SI-5SGTMC7N 功能描述:可编程逻辑 IC 开发工具 FPGA Starter Kit For Stratix V 5SGTMC7 RoHS:否 制造商:Altera Corporation 产品:Development Kits 类型:FPGA 工具用于评估:5CEFA7F3 接口类型: 工作电源电压:
DK-SI-5SGXEA7/ES 功能描述:可编程逻辑 IC 开发工具 FPGA Starter Kit For Stratix V 5SGXEA7 ES RoHS:否 制造商:Altera Corporation 产品:Development Kits 类型:FPGA 工具用于评估:5CEFA7F3 接口类型: 工作电源电压:
DK-SI-5SGXEA7N 功能描述:可编程逻辑 IC 开发工具 FPGA Starter Kit For Stratix V 5SGXEA7 RoHS:否 制造商:Altera Corporation 产品:Development Kits 类型:FPGA 工具用于评估:5CEFA7F3 接口类型: 工作电源电压:
DK-SL900A 制造商:ams 功能描述:Development kit for SL900A EPC Gen2 Sensory Tag IC
DK-SOC-10AS066S-A 功能描述:Arria 10 GX FPGA Evaluation Board 制造商:altera 系列:Arria 10 GX 零件状态:有效 类型:FPGA 配套使用产品/相关产品:Arria? 10 GX 内容:板 标准包装:1
DKSPS-001 制造商:Cooper Bussmann 功能描述:SMALL PARTITION PLATE DP25, DP35, DP45 A - Bulk 制造商:COOPER BUSSMANN 功能描述:SMALL PARTITION PLATE DP25, DP35, DP45 A